Syllabus

This section provides information on the course's objectives, expected learning outcomes, format, and policies.
Course Description

6.004 offers an introduction to the engineering of digital systems. Starting with MOS transistors, the course develops a series of building blocks - logic gates, combinational and sequential circuits, finite-state machines, computers and finally complete systems. Both hardware and software mechanisms are explored through a series of design examples.

6.004 is required material for any EECS undergraduate who wants to understand (and ultimately design) digital systems. A good grasp of the material is essential for later courses in digital design, computer architecture and systems. Before taking 6.004, students should feel comfortable using computers; a rudimentary knowledge of programming language concepts (6.001) and electrical fundamentals (6.002) is assumed.

The problem sets and lab exercises are intended to give students "hands-on" experience in designing digital systems; each student completes a gate-level design for a RISC processor during the semester. Access to workstations as well as help from the course staff is provided in the lab but it is possible to complete the assignments using Athena machines or one's home computer. Students are encouraged to get help from others in understanding the material, but the designs and measurements they hand in must be their own work.

Learning Objectives

On completion of 6.004, students will be able to:

  • Understand the role of abstraction in the design of large digital systems, and explain the major software and hardware abstractions in contemporary computer systems.
  • Analyze the performance of digital systems using measures such as latency and throughput.
  • Design simple hardware systems based on a variety of digital abstractions such as ROMs and logic arrays, logic trees, state machines, pipelining, and buses.
  • Synthesize digital systems from a library of representative components and test the designs under simulation.
  • Understand the operation of a moderately complex digital system - a simple RISC-based computer - down to the gate level, and be able to synthesize, implement, and debug its components.
  • Appreciate the technical skills necessary to be a capable digital systems engineer.

Measurable Outcomes

Upon completion of 6.004, students will be able to:

  • Identify flaws and limitations in simple systems implemented using the static discipline (noise assumptions, etc).
  • Identify flaws and limitations in simple systems implemented using clocked registers with asynchronous inputs (metastability issues).
  • Identify flaws and limitations in simple systems implemented using pipelined processors (pipeline hazards).
  • Identify flaws and limitations in simple systems implemented using semaphores for process synchronization (deadlocks).
  • Identify flaws and limitations in simple systems implemented using shared-memory multiprocessors (sequential inconsistency).
  • Characterize the logic function of combinational devices using CMOS, ROM, or PLA technologies.
  • Explain synthesis issues for combinational devices using CMOS, ROM, or PLA technologies from their functional specification.
  • Explain synthesis of acyclic circuits from combinational components.
  • Calculate performance characteristics of acyclic circuits with combinational components.
  • Explain and calculate performance characteristics of single-clock sequential circuits.
  • Design, debug, and test combinational circuits of the complexity of an arithmetic logic unit.
  • Design, debug, and test a controller for a finite-state machine.
  • Pipeline a combinational circuit for improved throughput.
  • Understand issues affecting microprocessor instruction set design.
  • Complete and debug the design of a simple CPU with a given RISC-based intruction set.
  • Measure the memory access performance of a processor, and tune cache design parameters to improve performance.
  • Analyze the operation of page-based virtual memory systems.
  • Translate simple programs from C to machine language.
  • Deduce processor state from a memory snapshot during execution.

Prerequisites

Students should feel comfortable using computers. A rudimentary knowledge of programming language concepts (C language or 6.001) and electrical fundamentals (6.002) is assumed.

Problem Sets

There are no weekly graded problem sets. Instead there are on-line tutorial problems with answers you can use to test your understanding of the material. The tutorials give you a chance to work on these problems with the help of a TA and to ask any questions that you may have.
 
Collaboration

The assignments are intended to help you understand the material and should be done individually. You are welcome to get help from others but the work you hand in must be your own. Copying another person's work or allowing your work to be copied by others is a serious academic offense and will be treated as such. We do spot-check submissions to the on-line checkoff system for infractions of the colloboration policy. So please don't tempt fate by submitting someone else's work as your own; it will save us all a lot of grief. 

Labs

There are seven lab assignments due at various times during the term. Completing each part of a lab earns points that count toward your final grade; the automated checkoff system will assign points when you check in your work. Note that you can submit your work for a lab more than once, for example, as you complete each part. After completing the work for each lab, you'll be presented with some on-line lab questions to answer (these are different than the tutorial questions mentioned above).

You must have a non-zero score for each lab and all on-line lab questions must be checked-off as a prerequisite for passing the course. A missing lab (i.e., a lab with a score of 0) will result in a failing grade; incompletes will not be given for unfinished laboratory work.

It is possible to complete the assignments using your own computer: the lab software is written in Java® and should run on any Java® Virtual Machine supporting JDK 1.3 or higher (see related resources for details).

Late policy for labs: The on-line system will give you 50% of any points earned for submissions after the due date. So if your first submittal is late, you get 50% of the points. But if you submitted on-time for 15 points, and then late for 25 points, you'll get 20 points total for the lab. Note that points reported by JSim/BSim at check-in are for on-time submittals; you can check your on-line status page to see how many points count toward your total.
 
Quizzes

There are 5 fifty-minute, closed-book quizzes. The questions will be similar (perhaps identical!) to the tutorial problems and will ask you to provide short, written answers and/or explanations. The quizzes are scheduled roughly every three weeks during your tutorial.

To ensure everyone has a seat, please attend your assigned tutorial on quiz days. If exceptional circumstances make it impossible to take a quiz at your assigned time, please contact your TA before the quiz to see if other arrangements can be made. Requests for make-ups after the quiz has been given are unlikely to be successful.

There is no final exam.
 
Grading

The final grade is determined by performance on the quizzes (25 points/quiz, 125 points total) and the seven labs (75 points total). In addition, you must have a non-zero score for each of the seven labs and all the on-line lab questions must be checked off as a prerequisite for passing the course. A missing lab will result in a failing grade; incompletes will not be given for unfinished laboratory work.

Once your combined score has been computed as explained above, here's how grades will be assigned:

"A": total >= 155 points or better
"B": 125 <= total < 155 points
"C": 105 <= total < 125 points
"D": 85 <= total < 105 points
"F": missing lab, less than 85 points

The staff reserves the right on a case-by-case basis to assign a better grade than the one determined by your score.

 

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